Job Responsibilities

German subsidiary in Shenzhen is established to develop modern IC (processor) for industrial automation applications based on 30 years of experience in powerplants industrial automation in Europe. Now hiring a CTO to be responsible for establishing a team of professionals to develop specialized ASICs: - topology of IC and contracting with SMIC/TSMC (28 nanometers technology) - development of IP blocks for ASICs - microarchitecture development of IPs (interface and system IPs). RTL team management to design RTL of new IPs and support existing IPs. - development of the IP verification plan. Leadership of the UVM verification team - adaptation of the existing HDL code for ASIC to FPGA - set up of testing and rejection of finished ASICs

Job Requirements

Requirements: - Higher technical education in the field of microelectronics/semiconductors - At least 5 years of team management of ASIC developers - Confident knowledge of microprocessor system architectures, ASIC design flow. - Excellent knowledge of Verilog, primitives and accepted approaches of designing IP blocks. Understanding the principles of implementing clock domain crossing - Knowledge of SystemVerilog and understanding of UVM methodology Understanding of prototyping on FPGA. Familiarity with prototyping tools and their features. - Understanding of technological testing methods and test structures integration in ASIC (bist, dft) - Detailed knowledge of chip packaging (flipchip, wirebond) - Fluency in written and oral English. - Previous experience in Rockchip, Loongson, Allwinner, Unisoc will be an advantage

Required Languages

Mandarin, English